Fully-depleted SOI CMOS circuits and technology for ultra-low power applications / by Takayasu Sakurai, Akira Matsuzawa and Takakuni Douseki
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| | | | | | Fully-depleted SOI CMOS circuits and technology for ultra-low power applications. - Dordrecht, The Netherlands , 2006. | | xv, 411 p. : ill. ; 25 cm. | | "The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society"--P. [4] of cover. | | ISBN 9780387292175 (hbk.) | | .-ISBN 0387292179 (hbk.). | | | | 1. Metal oxide semiconductors, Complementary - Very large scale integration 2. Silicon-on-insulator technology 3. Low voltage systems 4. Integrated circuits - Very large scale integration.I. Matsuzawa, Akira II. Douseki, Takakuni III. Title | | | Library : UiTM Shah Alam |
| | Accn No. | Item Status | Add Id | Location | SMD | Item Category | | 822814 | Shelf | | PERPUSTAKAAN KEJURUTERAAN TAR(P3) | BOOK | RAK TERBUKA (OPEN SHELVES) |
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