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SystemVerilog for verification : a guide to learning the testbench language features / Chris Spear

  • Linear

  • MARC

  •  
    TK7885.7
    .S67 2006
     
    683638 (Shelf),BOK
    Spear, Chris

         SystemVerilog for verification : a guide to learning the testbench language features. - New York, NY , 2006.

         xxxiv, 301 p. : ill. ; 25 cm.

         ISBN 9780387270364 (hbk.)
         .-ISBN 9780387270388 (e-isbn)
         .-ISBN 0387270361 (hbk.)
         .-ISBN 0387270388 (e-isbn).
         
         1. Verilog (Computer hardware description language) 2. Integrated circuits - Verification.I. Title
         Library : UiTM Shah Alam
    Accn No.Item StatusAdd IdLocationSMDItem Category
    683638ShelfPERPUSTAKAAN KEJURUTERAAN TAR(P3)BOOKRAK TERBUKA (OPEN SHELVES)

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