Formal VLSI correctness verification : proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design / sponsored by IMEC, Houthalen, Belgium, 13-16 November, 1989 ; edited by Luc J.M. Claesen
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| | | | | IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design |
| | Formal VLSI correctness verification : proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design. - Amsterdam. - New York , 1990. | | xv, 427 p. : ill. ; 23 cm VLSI design methods 2. | | ISBN 0444886885. | | | | 1. Computer-aided design - Congresses 2. Integrated circuits - Very large scale integration - Design and construction - Data processing - Congresses 3. Integrated circuits - Very large scale integration - Testing - Congresses - Congresses.I. Claesen, Luc J. M II. Interuniversity Micro-Electronics Center. III. Title IV. Series | | | Library : UiTM Shah Alam |
| | Accn No. | Item Status | Add Id | Location | SMD | Item Category | | 336598 | Shelf | | PERPUSTAKAAN KEJURUTERAAN TAR(P3) | BOOK | ret |
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